Shri Mata Vaishno Devi University is pleased to share that Dr. Anil Kumar Bhardwaj, Head, School of Electronics and Communication Engineering (SoECE) and Associate Professor, was invited as an expert speaker at the one-week Short Term Course (STC) on “From Conventional to AI-Assisted VLSI Design” organized by National Institute of Technical Teachers Training and Research Chandigarh.
The programme was coordinated by Prof. S. S. Gill and Prof. Balwinder Singh Dhaliwal of NITTTR Chandigarh. Faculty members and research scholars from various institutions across India participated in the STC. In recognition of his expertise in the field of VLSI Design and Integrated Circuits, Dr. Bhardwaj delivered expert sessions via online mode on 20 and 21 May 2026 on the topics “Digital CMOS Logic Design and Performance Optimization” and “Next-Generation Integrated Circuits & Challenges for AI Applications”, respectively.
The sessions highlighted recent advancements in CMOS logic design, performance optimization techniques, and emerging challenges in next-generation integrated circuits for AI-based applications. The lectures were highly appreciated by the participants for their technical depth, practical insights, and industry relevance.
Dr. Bhardwaj expressed his sincere gratitude to NITTTR Chandigarh, especially the coordinators Prof. S. S. Gill and Prof. Balwinder Singh Dhaliwal, for providing the opportunity to interact with faculty members and researchers from across the country. He appreciated the efforts of NITTTR Chandigarh in organizing quality academic programmes aimed at enhancing technical expertise and promoting emerging research areas in VLSI and AI-assisted semiconductor technologies.
Dr. Bhardwaj also expressed gratitude to the Hon’ble Vice Chancellor of Shri Mata Vaishno Devi University for his constant encouragement and support towards academic and research activities, and acknowledged the support of the university administration in promoting participation in national academic programmes.

