Shri Mata Vaishno Devi University
Official Website     Last Updated: 29th Jun, 2024
Admission 2024-25
Shri Mata Vaishno Devi University
Official Website     Last Updated: 29th Jun, 2024
Admission 2024-25

TEQIP-III sponsored One-Week Workshop on “Modeling & Simulation in Ultra Low Power VLSI Design” begins

25052019 modelingSimulation

SMVDU, Katra. May 2019. TEQIP-III sponsored One-Week Workshop on “Modeling & Simulation in Ultra Low Power VLSI Design” recently conducted at Shri Mata Vaishno Devi University (SMVDU), Katra. The workshop is organized by the School of Electronics & Communication Engineering, SMVDU. The key objective of the workshop was to provide an exposure to the faculty members/research scholars/students in the field of Modeling & Simulation in Ultra Low Power VLSI Design to enhance their knowledge in the domain. The aim of the workshop was to provide the hands-on practice on available EDA tools with the School. The resource persons for the workshop were from the reputed institutes like IIT Delhi, IIT (BHU), NIT Hamirpur, and from the industry for providing and arranging the hands-on practice for the participants. The workshop coordinators, Dr. Vijay Kumar Sharma and Dr. Sachin Kumar Gupta expressed their gratitude to Vice Chancellor, SMVDU, for his kind permission for organizing this workshop.

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